EVAL-ADN2817EBZ開發(fā)板套件編程器的評估演示板及套件規(guī)格書PDF中文資料

EVAL-ADN2817EBZ屬于開發(fā)板套件編程器的評估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVAL-ADN2817EBZ評估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的實施環(huán)境中評估某些重點器件的性能或特性。評估方法通常有完善的文檔說明，并且視乎具體情況由評估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對于數(shù)量特別多或類別獨特的器件類別(如 ADC、DAC 和開關(guān)模式電源)，評估平臺可組合為一個單獨的產(chǎn)品系列。

GENERAL DESCRIPTION

The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40°C to +85°C ambient temperature, unless otherwise noted.

FEATURES

Serial data input: 10 Mbps to 2.7 Gbps

Exceeds ITU-T jitter specifications

Integrated limiting amplifier

5 mV p-p sensitivity (ADN2817 only)

Adjustable slice level: ±100 mV (ADN2817 only)

Patented dual-loop clock recovery architecture

Programmable LOS detect (ADN2817 only)

Integrated PRBS generator and detector

No reference clock required

Loss of lock indicator

Supports double data rate

Bit error rate monitor (BERMON) or sample phase adjust options

Rate selectivity without the use of a reference clock

I2C interface to access optional features

Single-supply operation: 3.3 V

Low power

650 mW (ADN2817)

600 mW (ADN2818)

5 mm × 5 mm 32-lead LFCSP

APPLICATIONS

SONET OC-1, OC-3, OC-12, OC-48, and all associated FEC rates

Fibre Channel, 2× Fibre Channel, GbE, HDTV

WDM transponders

Regenerators/repeaters

Test equipment