DSPIC33CK512MP405中文資料微芯科技數(shù)據(jù)手冊PDF規(guī)格書

Advanced Analog Features

? Five ADC Modules:

– 12-bit, 3.5 Msps ADC

– Up to 27 conversion channels

– 250 ns conversion latency

? Six DAC/Analog Comparator Modules:

– 12-bit DACs with hardware slope compensation

– 15 ns analog comparators

? Shared DAC/Analog Output:

– DAC/analog comparator outputs

? Three Op Amp Modules – 20 MHz GBW:

– 40 V/s Slew Rate

– ±1 mV offset

Peripheral Features

? Three Quadrature Encoder Interfaces (QEIs):

– Four inputs: Phase A, Phase B, Home, Index

? Eight Configurable Logic Cells (CLCs) with Internal Connections to Select Peripherals and PPS

? Two Current Bias Generators (CBGs)

Safety Features

? DMT (Deadman Timer)

? ECC (Error Correcting Code) for Flash Memory

? WDT (Watchdog Timer)

? CodeGuard? Security

? CRC (Cyclic Redundancy Check)

? Flash OTP by ICSP? Write Inhibit

? RAM Memory Built-In Self Test (MBIST)

? Two-Speed Start-up

? Fail-Safe Clock Monitoring (FSCM)

? Backup FRC (BFRC)

? Capless Internal Voltage Regulator

? Virtual Pins for Redundancy and Monitoring