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DSP56F801FA60中文資料飛思卡爾數(shù)據(jù)手冊PDF規(guī)格書

DSP56F801FA60
廠商型號

DSP56F801FA60

功能描述

16-bit Digital Signal Controllers

文件大小

622.29 Kbytes

頁面數(shù)量

48

生產(chǎn)廠商 Freescale Semiconductor, Inc
企業(yè)簡稱

FREESCALE飛思卡爾

中文名稱

飛思卡爾半導(dǎo)體官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-6-11 15:47:00

人工找貨

DSP56F801FA60價格和庫存,歡迎聯(lián)系客服免費人工找貨

DSP56F801FA60規(guī)格書詳情

56F801 General Description

? Up to 30 MIPS operation at 60MHz core frequency

? Up to 40 MIPS operation at 80MHz core frequency

? DSP and MCU functionality in a unified, C-efficient architecture

? MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14

addressing modes

? Hardware DO and REP loops

? 6-channel PWM Module

? Two 4-channel, 12-bit ADCs

? Serial Communications Interface (SCI)

? Serial Peripheral Interface (SPI)

?8K ×16-bit words (16KB) Program Flas

?1K ×16-bit words (2KB) Program RAM

?2K ×16-bit words (4KB) Data Flash

?1K ×16-bit words (2KB) Data RAM

?2K ×16-bit words (4KB) Boot Flash

? General Purpose Quad Timer

? JTAG/OnCETM port for debugging

? On-chip relaxation oscillator

? 11 shared GPIO

? 48-pin LQFP Package

56F801 Features

Digital SignalProcessing Core

? Efficient 16-bit 56800 family controller engine with dual Harvard architecture

? As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency

? Single-cycle 16 ×16-bit parallel Multiplier-Accumulator (MAC)

? Two 36-bit accumulators including extension bits

? 16-bit bidirectional barrel shifter

? Parallel instruction set with unique processor addressing modes

? Hardware DO and REP loops

? Three internal address buses and one external address bus

? Four internal data buses and one external data bus

? Instruction set supports both DSP and controller functions

? Controller style addressing modes and instructions for compact code

? Efficient C compiler and local variable support

? Software subroutine and interrupt stack with depth limited only by memory

? JTAG/OnCE debug programming interface

Memory

? Harvard architecture permits as many as three simultaneous accesses to Program and Data memory

? On-chip memory including a low-cost, high-volume Flash solution

—8K ×16 bit words of Program Flash

—1K ×16-bit words of Program RAM

—2K ×16-bit words of Data Flash

—1K ×16-bit words of Data RAM

—2K ×16-bit words of Boot Flash

? Programmable Boot Flash supports customized boot code and field upgrades of stored code through a variety of interfaces (JTAG, SPI)

Peripheral Circuits for 56F801

? Pulse Width Modulator (PWM) with six PWM outputs, two Fault inputs, fault-tolerant design with deadtime

insertion; supports both center- and edge-aligned modes

? Two 12-bit, Analog-to-Digital Converters (ADCs), which support two simultaneous conversions with two

4-multiplexed inputs; ADC and PWM modules can be synchronized

? General Purpose Quad Timer: Timer D with three pins (or three additional GPIO lines)

? Serial Communication Interface (SCI) with two pins (or two additional GPIO lines)

? Serial Peripheral Interface (SPI) with configurable four-pin port (or four additional GPIO lines)

產(chǎn)品屬性

  • 型號:

    DSP56F801FA60

  • 功能描述:

    數(shù)字信號處理器和控制器 - DSP, DSC 60Mhz/30MIPS

  • RoHS:

  • 制造商:

    Microchip Technology

  • 核心:

    dsPIC

  • 數(shù)據(jù)總線寬度:

    16 bit

  • 程序存儲器大?。?/span>

    16 KB 數(shù)據(jù) RAM

  • 大小:

    2 KB

  • 最大時鐘頻率:

    40 MHz

  • 可編程輸入/輸出端數(shù)量:

    35

  • 定時器數(shù)量:

    3

  • 設(shè)備每秒兆指令數(shù):

    50 MIPs

  • 工作電源電壓:

    3.3 V

  • 最大工作溫度:

    + 85 C

  • 封裝/箱體:

    TQFP-44

  • 安裝風格:

    SMD/SMT

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