DSM2190F4V-15K6集成電路（IC）的存儲器規(guī)格書PDF中文資料

DSM2190F4V-15K6屬于集成電路（IC）的存儲器。由意法半導(dǎo)體集團制造生產(chǎn)的DSM2190F4V-15K6存儲器存儲器是集成電路上用作數(shù)據(jù)存儲設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

SUMMARY DESCRIPTION

The DSM2190F4 is a system memory device for use with the Analog Devices ADSP-2191 DSP.

DSM means Digital signal processor System Memory. A DSM device brings In-System Programmable (ISP) Flash memory, parameter storage, programmable logic, and additional I/O to DSP systems. The result is a simple and flexible two-chip solution for DSP designs. DSM devices provide the flexibility of Flash memory and smart JTAG programming techniques for both manufacturing and the field. On-chip integrated memory decode logic makes it easy to map dual banks of Flash memory to the ADSP-2191 in a variety of ways for bootloading, code execution, data recording, code swapping, and parameter storage.

FEATURES SUMMARY

■ Glueless Connection to DSP

– Easily add memory, logic, and I/O to the External Port of ADSP-2191 DSP

■ Dual Flash Memories

– Two independent Flash memory arrays for storing DSP code and data.

DSP may access the two arrays concurrently (read from one while

erasing or writing the other)

– 256K x 8 Main Flash memory divided into 8 sectors (32KByte each)

– Ample storage for booting DSP code/data

upon reset and subsequent code swaps

– Large capacity for data recording

– 32K x 8 Secondary Flash memory divided into 4

sectors (8 KByte each). Multiple uses:

– Small sector size ideal for small data sets,

and calibration or configuration constants

– Store custom start-up code in one or more

sectors and configure DSP to run from external memory upon reset (no boot)

– Concatenate Secondary Flash with Main

Flash for total of 288 KBytes

– Each Flash sector can be write protected.

– Built-in programmable address decoding logic

allows mapping individual Flash sectors to any

address boundary

■ Up to 16 Multifunction I/O Pins

– Increase total DSP system I/O capability

– I/O controlled by DSP software or PLD logic

■ General purpose PLD

– Over 3,000 Gates of PLD with 16 macro cells

– Use for peripheral glue logic to keypads, control

panel, displays, LCDs, and other devices

– Eliminate PLDs and external logic devices

– Create state machines, chip selects, simple

shifters and counters, clock dividers, delays

– Simple PSDsoft ExpressTM software...Free

■ Operating Range

– VCC: 3.3V±10; Temperature: –40oC to +85oC

■ In-System Programming (ISP) with JTAG

– Program entire chip in 10-25 seconds with no in

volvement of the DSP

– Links with ADSP-2191 JTAG debug port

– Eliminate sockets for pre-programmed memory

and logic devices

– ISP allows efficient manufacturing and product

testing supporting Just-In-Time inventory

– Use low-cost FlashLINKTM cable with PC

■ Content Security

– Programmable Security Bit blocks access of de

vice programmers and readers

■ Zero-Power Technology

– As low as 25μA standby current

■ Packaging

– 52-pin PQFP or 52-pin PLCC

■ Flash Memory Speed, Endurance, Retention

– 150 ns, 100K cycles, 15 year retention