DS2156G+中文資料美信數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The DS2156 is a software-selectable T1, E1, or J1 single-chip transceiver (SCT) for short-haul and long-haul applications. The backplane is user-configurable for a TDM or UTOPIA II bus interface. The DS2156 is composed of a line interface unit (LIU), framer, HDLC controllers, and a UTOPIA/TDM backplane interface, and is controlled by an 8-bit parallel port configured for Intel or Motorola bus operations. The DS2156 is pin and software compatible with the DS2155.

FEATURES

■ Complete T1/DS1/ISDN-PRI/J1 Transceiver Functionality

■ Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality

■ User-Selectable TDM or UTOPIA II Bus Interface

■ Long-Haul and Short-Haul Line Interface for Clock/Data Recovery and Waveshaping

■ CMI Coder/Decoder for Optical I/F

■ Crystal-Less Jitter Attenuator

■ Fully Independent Transmit and Receive Functionality

■ Dual HDLC Controllers

■ Programmable BERT Generator and Detector

■ Internal Software-Selectable Receive and Transmit-Side Termination Resistors for 75?/100?/120? T1 and E1 Interfaces

■ Dual Two-Frame Elastic-Store Slip Buffers that Connect to Asynchronous Backplanes Up to 16.384MHz

■ 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to Recovered Network Clock

APPLICATIONS

??? Inverse Mux ATM (IMA)

??? T1/E1/J1 Line Cards

??? Switches and Routers

??? Add-Drop Multiplexers