DM74AS640集成電路（IC）的緩沖器驅動器接收器收發(fā)器規(guī)格書PDF中文資料

General Description

This advanced Schottky device contains 8 pairs of 3-STATE logic elements configured as octal bus transceiver. This circuit is designed for use in memory, microprocessor systems and in asynchronous bidirectional data buses. This device transmits data from the A bus to the B bus, or vice versa, depending upon the logic level of the direction control input (DIR). The enable input (G) can be used to disable the devices, effecting isolation of buses A and B.

The 3-STATE circuitry also contains a protection feature that prevents these transceivers from glitching the bus during power-up or power-down.

Features

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full temperature and VCC range

■ Advanced oxide-isolated, ion-implanted Schottky TTL process

■ Functionally and pin for pin compatible with Schottky,

low power Schottky, and advanced low power Schottky TTL counterpart

■ Improved AC performance over Schottky, low power

Schottky, and advanced low power Schottky counter parts

■ 3-STATE outputs independently controlled on A and B buses

■ Low output impedance drive to drive terminated

transmission lines to 133?

■ Specified to interface with CMOS at VOH = VCC ? 2V