DG534ADJ集成電路（IC）的模擬開(kāi)關(guān)-特殊用途規(guī)格書(shū)PDF中文資料

DG534ADJ屬于集成電路（IC）的模擬開(kāi)關(guān)-特殊用途。由威世科技半導(dǎo)體制造生產(chǎn)的DG534ADJ模擬開(kāi)關(guān) - 特殊用途特殊用途模擬開(kāi)關(guān)通過(guò)固態(tài)設(shè)備路由模擬信號(hào)。該系列產(chǎn)品的與眾不同之處在于，這些模擬開(kāi)關(guān)針對(duì)特定的應(yīng)用，因此具有通用模擬開(kāi)關(guān)通常所沒(méi)有的獨(dú)特功能。

features

Wide Bandwidth: 500 MHz

Very Low Crosstalk: –97 dB @ 5 MHz

On-Board TTL-Compatible Latches with

Readback

Optional Negative Supply

Low rDS(on): 45

Single-Ended or Differential Operation

Latch-up Proof

benefits

Improved System Bandwidth

Improved Channel Off-Isolation

Simplified Logic Interfacing

High-Speed Readback

Allows Bipolar Signal Swings

Reduced Insertion Loss

Allows Differential Signal Switching

applications

Wideband Signal Routing and

Multiplexing

Video Switchers

ATE Systems

Infrared Imaging

Ultrasound Imaging

description









The DG534A is a digitally selectable 4-channel or dual

2-channel multiplexer. The DG538A is an 8-channel or dual

4-channel multiplexer. On-chip TTL-compatible address

decoding logic and latches with data readback are included to

simplify the interface to a microprocessor data bus. The low

on-resistance and low capacitance of the these devices make

them ideal for wideband data multiplexing and video and audio

signal routing in channel selectors and crosspoint arrays. An

optional negative supply pin allows the handling of bipolar

signals without dc biasing.

The DG534A/DG538A are built on a D/CMOS process that

combines n-channel DMOS switching FETs with low-power

CMOS control logic, drivers and latches. The low-capacitance

DMOS FETs are connected in a “T” configuration to achieve

extremely high levels of off isolation. Crosstalk is reduced to

–97 dB at 5 MHz by including a ground line between adjacent

signal paths. An epitaxial layer prevents latch-up.

For more information refer to Vishay Siliconix applications

note AN502.