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CY7C1381D

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D

18 Mbit (512 K ? 36/1 M ? 18) Flow Through SRAM

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D

18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100AXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100AXI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BGC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BGI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BGXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BGXI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BZC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BZI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BZXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-100BZXI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-133AXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-133BGC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-133BGXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-133BZC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D-133BZXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

FunctionalDescription[1] TheCY7C1381D/CY7C1383D/CY7C1381F/CY7C1383Fisa3.3V,512Kx36and1Mx18synchronousflowthroughSRAMs,designedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133MHzversion).A2-biton-chip

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

CY7C1381D_07

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導體公司

詳細參數(shù)

  • 型號:

    CY7C1381D

  • 功能描述:

    靜態(tài)隨機存取存儲器 512Kx36 3.3V COM Sync FT 靜態(tài)隨機存取存儲器

  • RoHS:

  • 制造商:

    Cypress Semiconductor

  • 存儲容量:

    16 Mbit

  • 組織:

    1 M x 16

  • 訪問時間:

    55 ns

  • 電源電壓-最大:

    3.6 V

  • 電源電壓-最?。?/span>

    2.2 V

  • 最大工作電流:

    22 uA

  • 最大工作溫度:

    + 85 C

  • 最小工作溫度:

    - 40 C

  • 安裝風格:

    SMD/SMT

  • 封裝/箱體:

    TSOP-48

  • 封裝:

    Tray

供應商型號品牌批號封裝庫存備注價格
Cypress
23+
165-LFBGA
7750
全新原裝優(yōu)勢
詢價
Cypress
165-FBGA
4600
Cypress一級分銷,原裝原盒原包裝!
詢價
CYRESS
24+
TQFP
6980
原裝現(xiàn)貨,可開13%稅票
詢價
Cypress
24+
QFP100
132
詢價
CypressSemiconductorCorp
2022
ICSRAM18MBIT100MHZ165LFB
5058
原廠原裝正品,價格超越代理
詢價
CYP
23+
貼片
5000
原裝正品,假一罰十
詢價
CYP
2339+
N/A
5650
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強勢庫存!
詢價
CYPRESS
24+
BGA
5000
只做原裝公司現(xiàn)貨
詢價
CYP
2020+
72
4500
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可
詢價
Cypress
2021+
TQFP100
4600
只做原裝假一罰十
詢價
更多CY7C1381D供應商 更新時間2024-11-16 14:04:00