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CY7C1371D-100AXI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit (512 K ? 36/1 M ? 18) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

包裝:托盤托盤 封裝/外殼:100-LQFP 類別:集成電路(IC) 存儲(chǔ)器 描述:IC SRAM 18MBIT PARALLEL 100TQFP

CYP

Cypress Semiconductor Corp

CY7C1371D-100AXIT

包裝:托盤托盤 封裝/外殼:100-LQFP 類別:集成電路(IC) 存儲(chǔ)器 描述:IC SRAM 18MBIT PARALLEL 100TQFP

CYP

Cypress Semiconductor Corp

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    CY7C1371D-100AXI

  • 制造商:

    Cypress Semiconductor Corp

  • 類別:

    集成電路(IC) > 存儲(chǔ)器

  • 系列:

    NoBL?

  • 包裝:

    托盤托盤

  • 存儲(chǔ)器類型:

    易失

  • 存儲(chǔ)器格式:

    SRAM

  • 技術(shù):

    SRAM - 同步,SDR

  • 存儲(chǔ)容量:

    18Mb(512K x 36)

  • 存儲(chǔ)器接口:

    并聯(lián)

  • 電壓 - 供電:

    3.135V ~ 3.6V

  • 工作溫度:

    -40°C ~ 85°C(TA)

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    100-LQFP

  • 供應(yīng)商器件封裝:

    100-TQFP(14x20)

  • 描述:

    IC SRAM 18MBIT PARALLEL 100TQFP

供應(yīng)商型號(hào)品牌批號(hào)封裝庫存備注價(jià)格
CYPRESS
2024+
N/A
70000
柒號(hào)只做原裝 現(xiàn)貨價(jià)秒殺全網(wǎng)
詢價(jià)
Cypress
23+
100-TQFP(14x20)
9550
專業(yè)分銷產(chǎn)品!原裝正品!價(jià)格優(yōu)勢!
詢價(jià)
CYPRESS
2016+
QFP
6523
只做進(jìn)口原裝現(xiàn)貨!或訂貨假一賠十!
詢價(jià)
CypressSemiconductorCorp
2022
ICSRAM18MBIT100MHZ100LQF
5058
原廠原裝正品,價(jià)格超越代理
詢價(jià)
CYP
2339+
N/A
5650
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢庫存!
詢價(jià)
CYPRESS
24+
QFP
6980
原裝現(xiàn)貨,可開13%稅票
詢價(jià)
CYPRESS
2020+
DIP-8
4500
百分百原裝正品 真實(shí)公司現(xiàn)貨庫存 本公司只做原裝 可
詢價(jià)
CYPRESS
22+23+
QFP
24140
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨
詢價(jià)
CYPRESS/賽普拉斯
QFP
1321
絕對(duì)現(xiàn)貨庫存
詢價(jià)
CYPRESS
22+
TQFP
10000
原裝正品優(yōu)勢現(xiàn)貨供應(yīng)
詢價(jià)
更多CY7C1371D-100AXI供應(yīng)商 更新時(shí)間2024-11-16 13:52:00