CSD97396Q4M集成電路（IC）的全半橋驅(qū)動(dòng)器規(guī)格書PDF中文資料

CSD97396Q4M屬于集成電路（IC）的全半橋驅(qū)動(dòng)器。由美國(guó)德州儀器公司制造生產(chǎn)的CSD97396Q4M全半橋驅(qū)動(dòng)器器件屬于電橋驅(qū)動(dòng)器電源管理集成電路 (PMIC) 系列，包含兩個(gè)或多個(gè)功率晶體管，以及在外部器件控制下將其用作開(kāi)關(guān)所需的電路。這些晶體管通常在內(nèi)部配置為成對(duì)串聯(lián)連接（稱為半橋），因而任意指定晶體管對(duì)之間的結(jié)點(diǎn)都可以連接至兩個(gè)電源軌中的任一個(gè)。這類器件常用于將控制器件（如微控制器）提供的低電平信號(hào)轉(zhuǎn)換為操作執(zhí)行器（如步進(jìn)電機(jī)或無(wú)刷電機(jī)）所需的較大功率信號(hào)。

1 Features

1? Over 93% System Efficiency at 15 A

? Max Rated Continuous Current 30 A, Peak 65 A

? High Frequency Operation (up to 2 MHz)

? High Density – SON 3.5 mm × 4.5 mm Footprint

? Ultra-Low Inductance Package

? System-Optimized PCB Footprint

? Ultra-Low Quiescent (ULQ) Current Mode

? 3.3 V and 5 V PWM Signal Compatible

? Diode Emulation Mode With FCCM

? Input Voltages up to 24 V

? Tri-State PWM Input

? Integrated Bootstrap Diode

? Shoot-Through Protection

? RoHS Compliant – Lead Free Terminal Plating

? Halogen Free

2 Applications

? Ultrabook/Notebook DC/DC Converters

? Multiphase Vcore and DDR Solutions

? Point-of-Load Synchronous Buck in Networking,

Telecom, and Computing Systems

3 Description

The CSD97396Q4M NexFET? Power Stage is a

highly optimized design for use in a high-power, high-

density synchronous buck converter. This product

integrates the driver IC and NexFET technology to

complete the power stage switching function. The driver IC has a built-in selectable diode emulation

function that enables DCM operation to improve light

load efficiency. In addition, the driver IC supports

ULQ mode that enables connected standby for Windows? 8. With the PWM input in tri-state,

quiescent current is reduced to 130 μA, with

immediate response. When SKIP# is held at tri-state,

the current is reduced to 8 μA (typically 20 μs is

required to resume switching). This combination

produces a high current, high efficiency, and high

speed switching device in a small 3.5 × 4.5 mm

outline package. In addition, the PCB footprint is

optimized to help reduce design time and simplify the

completion of the overall system design.