CDB42428開發(fā)板套件編程器的評估演示板及套件規(guī)格書PDF中文資料

CDB42428屬于開發(fā)板套件編程器的評估演示板及套件。由凌云邏輯制造生產(chǎn)的CDB42428評估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的實施環(huán)境中評估某些重點器件的性能或特性。評估方法通常有完善的文檔說明，并且視乎具體情況由評估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對于數(shù)量特別多或類別獨特的器件類別(如 ADC、DAC 和開關(guān)模式電源)，評估平臺可組合為一個單獨的產(chǎn)品系列。

General Description

The CS42428 codec provides two analog-to-digital and eight digital-to-analog delta-sigma converters, as well as an integrated PLL.

The CS42428 integrated PLL provides a low-jitter system clock. The internal stereo ADC is capable of independent channel gain control for single-ended or differential analog inputs. All eight channels of DAC provide digital volume control and differential analog outputs. The general-purpose outputs may be driven high or low, or mapped to a variety of DAC mute controls or ADC overflow indicators.

Features

? Eight 24-bit D/A, two 24-bit A/D Converters

? 114 dB DAC / 114 dB ADC Dynamic Range

? -100 dB THD+N

? System Sampling Rates up to 192 kHz

? Integrated Low-Jitter PLL for Increased System Jitter Tolerance

? PLL Clock or System Clock Selection

? 7 Configurable General-Purpose Outputs

? ADC High-Pass Filter for DC Offset Calibration

? Expandable ADC Channels and One-Line Mode Support

? Digital Output Volume Control with Soft Ramp

? Digital +/-15 dB Input Gain Adjust for ADC

? Differential Analog Architecture

? Supports Logic Levels between 1.8 V and 5 V