CD4015B

CMOS Dual 4-Stage Static Shift Register

CD4015BC

Dual 4-Bit Static Shift Register

GeneralDescription TheCD4015BCcontainstwoidentical,4-stage,serialinput/parallel-outputregisterswithindependent“Data”,“Clock,”and“Reset”inputs.Thelogiclevelpresentattheinputofeachstageistransferredtotheoutputofthatstageateachpositive-goingclocktransition.A

CD4015BCM

Dual 4-Bit Static Shift Register

GeneralDescription TheCD4015BCcontainstwoidentical,4-stage,serialinput/parallel-outputregisterswithindependent“Data”,“Clock,”and“Reset”inputs.Thelogiclevelpresentattheinputofeachstageistransferredtotheoutputofthatstageateachpositive-goingclocktransition.A

CD4015BCN

Dual 4-Bit Static Shift Register

GeneralDescription TheCD4015BCcontainstwoidentical,4-stage,serialinput/parallel-outputregisterswithindependent“Data”,“Clock,”and“Reset”inputs.Thelogiclevelpresentattheinputofeachstageistransferredtotheoutputofthatstageateachpositive-goingclocktransition.A

CD4015BDTR

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’sSatelliteApplicationsFlow?(SAF)devicesarefullytestedandguaranteedto100kRADtotaldose.TheseQMLClassTdevicesareprocessedtoastandardflowintendedtomeetthecostandshorterlead-timeneedsoflargevolumesatellitemanufacturers,whilemaintainingahighlevelofr

CD4015BKTR

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’sSatelliteApplicationsFlow?(SAF)devicesarefullytestedandguaranteedto100kRADtotaldose.TheseQMLClassTdevicesareprocessedtoastandardflowintendedtomeetthecostandshorterlead-timeneedsoflargevolumesatellitemanufacturers,whilemaintainingahighlevelofr

CD4015BMS

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMSconsistsoftwoidentical,independent,4-stageserial-input/paralleloutputregisters.EachregisterhasindependentCLOCKandRESETinputsaswellasasingleserialDATAinput.“Q”outputsareavailablefromeachofthefourstagesonbothregisters.Allregisterstages

CD4015BMS

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Features ?High-VoltageType(20VRating) ?MediumSpeedOperation12MHz(typ.)ClockRateat VDD-VSS=10V ?FullyStaticOperation ?8Master-SlaveFlip-FlopsPlusInputandOutputBuffering ?100TestedForQuiescentCurrentat20V ?5V,10Vand15VParametricRatings ?StandardizedS

CD4015BT

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’sSatelliteApplicationsFlow?(SAF)devicesarefullytestedandguaranteedto100kRADtotaldose.TheseQMLClassTdevicesareprocessedtoastandardflowintendedtomeetthecostandshorterlead-timeneedsoflargevolumesatellitemanufacturers,whilemaintainingahighlevelofr

CD4015B_15

CMOS Dual 4-stage Static Shift Register