C161V中文資料西門(mén)子數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Introduction

The C161 is a new derivative of the Siemens SAB 80C166 family of single-chip CMOS microcontrollers. It combines high CPU performance (up to 8 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. The C161 derivatives are especially suited for cost sensitive applications.

● High Performance 16-bit CPU with 4-Stage Pipeline

● 125 ns Instruction Cycle Time at 16-MHz CPU Clock

● 625 ns Multiplication (16 × 16 bits), 1,25 μs Division (32 / 16 bit)

● Enhanced Boolean Bit Manipulation Facilities

● Additional Instructions to Support HLL and Operating Systems

● Register-Based Design with Multiple Variable Register Banks

● Single-Cycle Context Switching Support

● Clock Generation via Prescaler or via Direct Clock Input

● Up to 4 MBytes Linear Address Space for Code and Data

● 1 KByte On-Chip RAM on C161V and C161K, 2 KBytes On-Chip RAM on C161O

● Programmable External Bus Characteristics for Different Address Ranges

● 8-Bit or 16-Bit External Data Bus

● Multiplexed or Demultiplexed External Address/Data Buses (MUX Bus only on C161V)

● Programmable Chip-Select Signals (not on C161V)

● 1024 Bytes On-Chip Special Function Register Area

● Idle and Power Down Modes (not on C161V)

● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event

Controller (PEC)

● 16-Priority-Level Interrupt System with 14 Sources on C161V, 20 Sources on C161K, C161O

● Multi-Functional General Purpose Timer Unit(s)

● Synchronous/Asynchronous Serial Channel

● High-Speed-Synchronous Serial Channel

● Programmable Watchdog Timer

● Up to 63 General Purpose I/O Lines

● Supported by a Large Range of Development Tools like C-Compilers, Macro-Assembler

Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer

Disassemblers, Programming Boards

● Ambient Temperature Range 0 to 70 ?C

● 80-Pin MQFP Package (0.65 mm pitch)