C1005JB0J105KT中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The ADP5037 combines two high performance buck regulators and two low dropout (LDO) regulators in a small, 24-lead 4 mm × 4 mm LFCSP to meet demanding performance and board space requirements.

The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low and the load is above a predefined threshold, the buck regulators operate in PWM mode. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light-load efficiency.

FEATURES

Main input voltage range: 2.3 V to 5.5 V

Two 800 mA buck regulators and two 300 mA LDOs

24-lead, 4 mm × 4 mm LFCSP package

Regulator accuracy: ±1.8

Factory programmable or external adjustable VOUTx

3 MHz buck operation with forced PWM and auto PWM/PSM

modes

BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V

LDO1/LDO2: output voltage range from 0.8 V to 5.2 V

LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V

LDO1/LDO2: high PSRR and low output noise

APPLICATIONS

Power for processors, ASICS, FPGAs, and RF chipsets

Portable instrumentation and medical devices

Space constrained devices