AZ100EL32D中文資料AZM數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system.

The EL32 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single-ended input applications, the VBB reference should be connected to one side of the CLK/CLK ˉˉˉˉ differential input pair. The input signal is then fed to the other CLK/CLK ˉˉˉˉ input. The VBB pin should be used only as a bias for the EL32 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor.

FEATURES

? 510ps Propagation Delay

? 3.0GHz Toggle Frequency

? High Bandwidth Output Transitions

? 75k? Internal Input Pulldown Resistors

? Direct Replacement for ON Semiconductor MC10EL32 & MC100EL32