ANX7497中文資料硅谷數(shù)模數(shù)據(jù)手冊PDF規(guī)格書

Features

? Built-in re-timers

? Integrated re-timers for USB3.2 up to Gen 2 @ 10Gbps

? US3.2 Specification (Appendix-E) compliant re-timer

? Supports both Separate Reference Clock Independent SSC (SRIS) and Bit-Level Re-timer (BLR) Architectures of USB3.2 Specification (Appendix-E)

? Integrated re-timers (Link training-tunable PHY repeater) for DisplayPort up to HBR3 @ 8.1Gbps. Supports both transparent mode and non-transparent mode (transparent or LTTPR)

? Supports both host (source) and device (sink) applications in USB-C subsystems

? Loss compensation to recover up to 23dB channel loss (USB), up to 27dB (DP)

? Integrated mux

? Integrated (4x4) mux switches USB and DP signals and preserves enhanced signal output over USB-C connector

? Mux control input through I2C commands from external I2C master (or, optionally through GPIO of FLIP/USB_EN/DP_EN pins)

? Integrated SBU/AUX mux for switching DisplayPort AUX +/- signals

? Integrated reference clock

? Serial and debug interfaces

? I2C Slave interface, up to 1MHz, for mux and re-timer configuration

? Industry standard compatibility

? USB3.2 specification, Appendix E

? DisplayPort 1.4a specification

? USB Type-C r1.2 specification

? Intel USB3.2 Repeater and Active Switch specification

? Low-power design

? Analog power supply at 1.8V

? I/O power supply at 1.8V

? Core power supply at 1.2V

? Package

? QFN-50, 4.7mm x 6.4mm, 0.90mm Z-height, 0.35mm pin-pitch

? LGA-34, 3.3mm x 4.8mm, 0.71mm Z-height, 0.35mm pin-pitch

? Commercial temperature range of 0C to 70C

Applications

Notebooks, desktops, gaming PCs, workstations, servers, 2-in-1 PCs, active cables and accessories