AN221D04-EVAL中文資料etc未分類制造商數據手冊PDF規(guī)格書

The AN221E04 device consists of a 2x2 matrix of fully Configurable Analog Blocks (CABs), surrounded by a fabric of programmable interconnect resources. Configuration data is stored in an on-chip SRAM configuration memory. Compared with the first-generation FPAAs, the Anadigmvortex architecture provides a significantly improved signal-to-noise ratio as well as higher bandwidth. These devices also accommodate nonlinear functions such as sensor response linearization and arbitrary waveform synthesis.

PRODUCT FEATURES

? Dynamic reconfiguration

? Four configurable I/O cells, two dedicated output cells

? 8-bit SAR analog–to–digital converter

? Fully differential architecture

? Fully differential I/O buffering with options for single ended to differential conversion

? Low input offset through chopper stabilized amplifiers

? 256 Byte Look-Up Table (LUT) for linearization and arbitrary signal generation

? 4:1 Input multiplexer

? Typical Signal Bandwidth: DC-2MHz (Bandwidth is CAM dependent)

? Signal to Noise Ratio:

o Broadband 80dB

o Narrowband (audio) 100dB

? Total Harmonic Distortion (THD): 80dB

? DC offset <100μV

? Package: 44-pin QFP (10x10x2mm)

o Lead pitch 0.8mm

? Supply voltage: 5V

APPLICATIONS

? Real-time software control of analog system peripherals

? Intelligent sensors

? Adaptive filtering and control

? Adaptive DSP front-end

? Adaptive industrial control and automation

? Self-calibrating systems

? Compensation for aging of system components

? Dynamic recalibration of remote systems

? Ultra-low frequency signal conditioning

? Custom analog signal processing