APPLICATIONS

? 4 1/2 digits to 5 1/2 digits plus sign measurements

? Precision analog signal processor

? Precision sensor interface

? High accuracy DC measurement functions

? Portable battery operated instruments

? Computer peripheral

? PCMCIA

GENERAL DESCRIPTION

The ALD500AU/ALD500A/ALD500 are integrating dual slope analog

processors, designed to operate on ±5V power supplies for building

precision analog-to-digital converters. The ALD500AU/ALD500A/

ALD500 feature specifications suitable for 18 bit/17 bit/16 bit resolution

conversion, respectively. Together with three capacitors, one resistor,

a precision voltage reference, and a digital controller, a precision

Analog to Digital converter with auto zero can be implemented. The

digital controller can be implemented by an external microcontroller,

under either hardware (fixed logic) or software control. For ultra high

resolution applications, up to 23 bit conversion can be implemented with

an appropriate digital controller and software.

The ALD500 series of analog processors accept differential inputs and

the external digital controller first counts the number of pulses at a fixed

clock rate that a capacitor requires to integrate against an unknown

analog input voltage, then counts the number of pulses required to

deintegrate the capacitor against a known reference voltage. This

unknown analog voltage can then be converted by the microcontroller

to a digital word, which is translated into a high resolution number,

representing an accurate reading. This reading, when ratioed against

the reference voltage, yields an accurate, absolute voltage measurement

reading.

The ALD500 analog processors consist of on-chip digital control circuitry

to accept control inputs, integrating buffer amplifiers, analog switches,

and voltage comparators. It functions in four operating modes, or

phases, namely auto zero, integrate, deintegrate, and integrator zero

phases. At the end of a conversion, the comparator output goes from

high to low when the integrator crosses zero during deintegration.

ALD500 analog processors also provide direct logic interface to CMOS

logic families.

BENEFITS

? Wide dynamic signal range

? Very high noise immunity

? Low cost, simple functionality

? Automatic compensation and cancellation of

error sources

? Easy to use to acquire true 18 bit,17 bit, or

16 bit conversion and noise performance

? Inherently linear and stable with temperature

and component variations

FEATURES

? Resolution up to 18 bits plus sign bit

and over-range bit

? Accuracy independent of input source

impedances

? High input impedance of 1012 W

? Inherently filters and integrates any

external noise spikes

? Differential analog input

? Wide bipolar analog input voltage

range ±3.5V

? Automatic zero offset compensation

? Low linearity error - as low as 0.002

? Fast zero-crossing comparator - 1ms

? Low power dissipation - 6mW typical

? Automatic internal polarity detection

? Low input current - 2pA typical

? Microprocessor controlled conversion

? Optional digital control from a microcontroller,

an ASIC, or a dedicated digital circuit

? Flexible conversion speed versus resolution

trade-off