ADC3683HBP/EM中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? Space screening and radiation performance

– QML-V screening and reliability

– Total ionizing dose (TID): 300 krad (Si)

– Single event latchup (SEL): 75 MeV-cm2/mg

? Ambient temperature range: ?55°C to 105°C

? Dual channel ADC

? 18-bit 65MSPS

? Noise Floor: -160dBFS/Hz

? Low power and optimized power scaling:

50mW/ch (10MSPS) to 94mW/ch (65MSPS)

? Latency: 1-2 clock cycles

? 18-bit, no missing codes

? INL: ±9, DNL: ±0.7 LSB (typical)

? Reference: external or internal

? Input bandwidth: 140MHz (–3dB)

? On-chip digital filter (optional)

– Decimation by 2, 4, 8, 16, 32

– 32-bit NCO

? Serial LVDS digital interface (2-, 1- and 1/2-wire)

? Spectral performance (fIN = 5MHz):

– SNR: 83.5dBFS

– SFDR: 87dBc HD2, HD3

– SFDR: 99dBFS worst spur

2 Applications

? Satellite optical communications payload

? Satellite imaging payloads

? Satellite communication payloads

? Satellite RADAR and LIDAR payloads.

3 Description

The ADC3683-SP is a low noise, ultra-low power 18-

bit 65MSPS high-speed dual channel ADC. Designed

for lowest noise performance, the device delivers a

noise spectral density of ?160dBFS/Hz combined with

excellent linearity and dynamic range. The ADC3683-

SP offers DC precision together with IF sampling

support making it designed for a wide range of

applications. High-speed control loops benefit from

the short latency as low as only 1 clock cycle. The

ADC consumes only 94mW/ch at 65Msps and the

power consumption scales well with lower sampling

rates.

The device uses a serial LVDS (SLVDS) interface

to output the data which minimizes the number of

digital interconnects. The device supports two-lane,

one-lane and half-lane options. The device is pin-topin

compatible with the 14-bit, 125MSPS ADC3664-

SP. The device comes in a 64-pin CFP package

(10.9mm x 10.9mm), and supports a temperature

range from ?55°C to +105°C.