ADC3641集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

1 Features

? Dual channel

? 14-bit 125 MSPS ADC

? Noise floor: –153 dBFS/Hz

? Ultra-low power with optimized power scaling:

82 mW/ch (125 MSPS)

? Latency: 1 clock cycle

? 14-Bit, no missing codes

? INL: ±1.5 LSB; DNL: ±0.5 LSB

? Reference: external or internal

? Industrial temperature range: –40°C to +105°C

? On-chip digital filter (optional)

– Decimation by 2, 4, 8, 16, 32

– 32-bit NCO

? DDR and Serial CMOS interface

? Small footprint: 40-WQFN (5 mm × 5 mm) package

? Single 1.8-V supply

? Spectral performance (fIN = 5 MHz):

– SNR: 74.0 dBFS

– SFDR: 90-dBc HD2, HD3

– SFDR: 100-dBFS worst spur

? Spectral performance (fIN = 70 MHz):

– SNR: 72.5 dBFS

– SFDR: 70-dBc HD2, HD3

– SFDR: 85-dBFS worst spur

2 Applications

? High-speed data acquisition

? Industrial monitoring

? Thermal imaging

? Imaging and sonar

? Software defined radio

? Power quality

? Communications infrastructure

? High-speed control loops

? Instrumentation

? Smart grids

? Spectroscopy

? Radar

3 Description

The ADC3644 device is a low-noise, ultra-low power,

14-bit, 125-MSPS dual-channel, high-speed analogto-

digital converter (ADC). Designed for low power

consumption, the device delivers a noise spectral

density of –153 dBFS/Hz, combined with very good

linearity and dynamic range. The ADC3644 offers IF

sampling support, which make the device an excellent

choice for a wide range of applications. High-speed

control loops benefit from the short latency of only one

clock cycle. The ADC consumes only 82 mW/ch at

125 MSPS, and power consumption scales well with

lower sampling rates.

The ADC3644 use a DDR or a serial CMOS interface

to output the data offering lowest power digital

interface, together with flexibility to minimize the

number of digital interconnects. These devices are

a pin-to-pin compatible family with different speed

grades. These devices support the extended industrial

temperature range of –40 to 105?C.