ADC1215S集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

General description

The ADC1215S is a single channel 12-bit Analog-to-Digital Converter (ADC) optimized for

high dynamic performance and low power consumption at sample rates up to 125 Msps.

Pipelined architecture and output error correction ensure the ADC1215S is accurate

enough to guarantee zero missing codes over the entire operating range. Supplied from a

single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode

because of a separate digital output supply.

The ADC1215S supports the Low Voltage Differential Signalling (LVDS) Double Data

Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the

user to easily configure the ADC.

The device also includes a SPI programmable full-scale to allow flexible input voltage

range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the

baseband to input frequencies of 170 MHz or more, the ADC1215S is ideal for use in

communications, imaging and medical applications - especially in high Intermediate

Frequency (IF) applications because of the integrated input buffer. The input buffer

ensures that the input impedance remains constant and low and the performance

consistent over a wide frequency range.

Features and benefits

? SNR, 70 dBFS / SFDR, 86 dBc ? Input bandwidth, 600 MHz

? Sample rate up to 125 Msps ? Power dissipation, 635 mW at 80 Msps,

including analog input buffer

? 12-bit pipelined ADC core ? SPI

? Clock input divided by 2 for less jitter

contribution

? Duty cycle stabilizer

? Integrated input buffer ? Fast OuT-of-Range (OTR) detection

? Flexible input voltage range: 1 V (p-p) to

2 V (p-p)

? Offset binary, two’s complement, gray

code

? CMOS or LVDS DDR digital outputs ? Power-down and Sleep modes

? Pin compatible with the ADC1415S

series, the ADC1015S series and the

ADC1115S125

? HVQFN40 package