AD9272集成電路（IC）的ADC/DAC-特殊用途規(guī)格書PDF中文資料

AD9272屬于集成電路（IC）的ADC/DAC-特殊用途。由亞德諾半導體技術有限公司制造生產的AD9272ADC/DAC - 特殊用途該產品族中的產品可用于模擬和數字表示的信息轉換，適用于特定用例，或集成了通用數據轉換器中不常見的其他功能。例如針對超聲或汽車雷達應用集成了低噪聲放大器和可變增益級的器件、注重音頻和視頻的產品、在段碼式顯示器上集成顯示測量值功能的器件、集成輸入輸出電氣隔離的器件等。

GENERAL DESCRIPTION

The AD9272 is designed for low cost, low power, small size, and ease of use. It contains eight channels of a low noise preamplifier (LNA) with a variable gain amplifier (VGA), an antialiasing filter (AAF), and a 12-bit, 10 MSPS to 80 MSPS analog-todigital converter (ADC).

FEATURES

8 channels of LNA, VGA, AAF, and ADC

Low noise preamplifier (LNA)

Input-referred noise voltage = 0.75 nV/√Hz

(gain = 21.3 dB) @ 5 MHz typical

SPI-programmable gain = 15.6 dB/17.9 dB/21.3 dB

Single-ended input; VIN maximum = 733 mV p-p/

550 mV p-p/367 mV p-p

Dual-mode active input impedance matching

Bandwidth (BW) > 100 MHz

Full-scale (FS) output = 4.4 V p-p differential

Variable gain amplifier (VGA)

Attenuator range = ?42 dB to 0 dB

SPI-programmable PGA gain = 21 dB/24 dB/27 dB/30 dB

Linear-in-dB gain control

Antialiasing filter (AAF)

Programmable 2nd-order low-pass filter (LPF) from

8 MHz to 18 MHz

Programmable high-pass filter (HPF)

Analog-to-digital converter (ADC)

12 bits at 10 MSPS to 80 MSPS

SNR = 70 dB

SFDR = 75 dB

Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)

Data and frame clock outputs

Includes an 8 × 8 differential crosspoint switch to support

continuous wave (CW) Doppler

Low power, 195 mW per channel at 12 bits/40 MSPS (TGC)

120 mW per channel in CW Doppler

Flexible power-down modes

Overload recovery in <10 ns

Fast recovery from low power standby mode, <2 μs

100-lead TQFP

APPLICATIONS

Medical imaging/ultrasound

Automotive radar