86004I中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Four LVCMOS/LVTTL outputs, 7Ω typical output impedance

? Single LVCMOS/LVTTL clock input

? CLK accepts the following input levels: LVCMOS or LVTTL

? Output frequency range: 15.625MHz to 62.5MHz

? Input frequency range: 15.625MHz to 62.5MHz

? VCO range: 250MHz to 500MHz

? External feedback for “zero delay” clock regeneration

with confi gurable frequencies

? Fully integrated PLL

? Cycle-to-cycle jitter: 75ps (maximum)

? Output skew: 65ps (maximum)

? Full 3.3V or 2.5V, or 3.3V core/2.5V output operating supply

? -40°C to 85° ambient operating temperature

? Available in lead-free RoHS compliant package