859S0412BGILFT中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

廠商型號	859S0412BGILFT
功能描述	4:2, Differential-to-LVPECL/LVDS Clock Multiplexer
絲印標識	ICS9S0412BIL
封裝外殼	TSSOP
文件大小	1.13242 Mbytes
頁面數(shù)量	24 頁
生產廠商	Renesas Technology Corp
企業(yè)簡稱	RENESAS【瑞薩】
中文名稱	瑞薩科技有限公司官網
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-21 22:30:00
人工找貨	859S0412BGILFT價格和庫存，歡迎聯(lián)系客服免費人工找貨

Features

? High speed 4:1 differential multiplexer with a 1:2 fanout buffer

? Two differential LVPECL or LVDS output pairs

? Four selectable differential PCLKx, nPCLKx input pairs

? PCLKx, nPCLKx pairs can accept the following differential

input levels: LVPECL, LVDS, CML

? Maximum output frequency: 3GHz

? Translates any single ended input signal to LVPECL levels with

resistor bias on nPCLKx input

? Part-to-part skew: 100ps (maximum)

? Propagation delay: 565ps (typical) at 3.3V

? Additive phase jitter, RMS: 0.22ps (typical) at 3.3V

? Full 3.3V or 2.5V supply modes

? -40°C to 85°C ambient operating temperature

? Available in lead-free (RoHS 6) package