85408標簽標志護欄標識的標志銘牌招貼規(guī)格書PDF中文資料

Features

? Eight differential LVDS output pairs

? CLK/nCLK can accept the following differential input levels:

LVPECL, LVDS, LVHSTL, HCSL, SSTL

? Maximum output frequency: 700MHz

? Translates any differential input signal (LVPECL, LVHSTL, SSTL,

HCSL) to LVDS levels without external bias networks

? Translates any single-ended input signal to LVDS with resistor

bias on nCLK input

? Output skew: 50ps (maximum)

? Part-to-part skew: 550ps (maximum)

? Propagation delay: 2.4ns (maximum)

? 3.3V operating supply

? 0°C to 70°C ambient operating temperature

? Available in lead-free (RoHS 6) package