74VCXH162240MTD中文資料仙童半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

General Description

The VCXH162240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver.

The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The VCXH162240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.

The 74VCXH162240 is also designed with 26? series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The 74VCXH162240 is designed for low voltage (1.65V to 3.6V) VCC applications with output capability up to 3.6V.

The 74VCXH162240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features

■ 1.65V–3.6V VCC supply operation

■ 3.6V tolerant control inputs and outputs

■ Bushold on data inputs eliminating the need for external pull-up/pull-down resistors

■ 26? series resistors in outputs

■ tPD

3.3 ns max for 3.0V to 3.6V VCC

3.8 ns max for 2.3V to 2.7V VCC

7.6 ns max for 1.65V to 1.95V VCC

■ Static Drive (IOH/IOL)

±12 mA @ 3.0V VCC

±8 mA @ 2.3V VCC

±3 mA @ 1.65V VCC

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V