1. General description

The 74LVT16374A; 74LVTH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs.

The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks

(1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops

will store the state of their individual D-inputs that meet the set-up and hold time requirements

on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a

high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops.

2. Features and benefits

? 16-bit edge-triggered flip-flop

? 3-state buffers

? Output capability: +64 mA and -32 mA

? Wide supply voltage range from 2.7 to 3.6 V

? Overvoltage tolerant inputs to 5.5 V

? BiCMOS high speed and output drive

? Direct interface with TTL levels

? Input and output interface capability to systems at 5 V supply

? Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs.

(74LVTH16374A only)

? Live insertion and extraction permitted

? Power-up reset

? Power-up 3-state

? No bus current loading when output is tied to 5 V bus

? IOFF circuitry provides partial Power-down mode operation

? Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

? Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Specified from -40 °C to 85 °C

74LVTH16374ADGG屬于集成電路（IC） > 觸發(fā)器。安世半導體(中國)有限公司制造生產的74LVTH16374ADGG觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復位）和 JK，對提供給其輸入的信號有不同的響應，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。