FEATURES:

? Choose among the following memory organizations:

IDT72V2101 ? 262,144 x 9

IDT72V2111 ? 524,288 x 9

? Pin-compatible with the IDT72V261/72V271 and the IDT72V281/

72V291 SuperSync FIFOs

? 10ns read/write cycle time (6.5ns access time)

? Fixed, low first word data latency time

? 5V input tolerant

? Auto power down minimizes standby power consumption

? Master Reset clears entire FIFO

? Partial Reset clears data, but retains programmable settings

? Retransmit operation with fixed, low first word data latency time

? Empty, Full and Half-Full flags signal FIFO status

? Programmable Almost-Empty and Almost-Full flags, each flag can

default to one of two preselected offsets

? Program partial flags by either serial or parallel means

? Select IDT Standard timing (using EF and FF flags) or First Word Fall

Through timing (using OR and IR flags)

? Output enable puts data outputs into high impedance state

? Easily expandable in depth and width

? Independent Read and Write clocks (permit reading and writing

simultaneously)

72V2111L15PFG屬于集成電路（IC） > FIFO 存儲器。瑞薩科技有限公司制造生產的72V2111L15PFGFIFO 存儲器先入先出 (FIFO) 存儲器可用于數字信息的短期存儲，其中信息檢索順序和序列與信息存儲順序和序列相同。這類產品又稱為隊列或緩沖存儲器，通常用于在單獨的設備之間交換信息，尤其是在數據以不同的速率或在略微不同的時間點生成和使用的情況下。